Multiprocessor System-on-Chip Prototyping Using Dynamic Binary Translation [chapter]

Frédéric Pétrot, Luc Michel, Clément Deschamps
2017 Handbook of Hardware/Software Codesign  
Dynamic binary translation is a processor emulation technology that allows to execute in a very efficient manner a binary program for an instruction-set architecture A on a processor having instruction-set architecture B. This chapter starts by giving a rapid overview of the dynamic binary translation process and its peculiarities. Then, it focuses on the support for SIMD instruction and the translation for VLIW architectures, which bring upfront new challenges for this technology. Next, it
more » ... s how the translation process can be enhanced by the insertion of instructions to monitor nonfunctional metrics, with the aim of giving, for instance, timing or power consumption estimations. Finally, it details how it can be integrated within virtual prototyping platforms, looking in particular at the synchronization issues.
doi:10.1007/978-94-017-7267-9_20 fatcat:tm2sgvat2bfj7ps7d2hkxs23ja