Low-power low-noise analog circuits for on-focal-plane signal processing of infrared sensors

Bedabrata Pain, Sunetra K. Mendis, Robert C. Schober, Robert H. Nixon, Eric R. Fossum, Albert M. Fowler
<span title="1993-10-20">1993</span> <i title="SPIE"> Infrared Detectors and Instrumentation </i> &nbsp;
On-focal-plane signal processing circuits for enhancement of JR imager performance are presented. To enable the detection of high background IR images, an in-pixel current-mode background suppression scheme is presented. The background suppression circuit consists of a current memoiy placed in the feedback loop of a CTIA and is designed for a thousand-fold suppression of the background flux, thereby easing circuit design constraints, and assuring BLIP operation even with detectors having large
more &raquo; ... esponse non-uniformities. For improving the performance of low-background [R imagers, an on-chip column-parallel analog-to-digital converter (ADC) is presented. The design of a 10-bit ADC with 50 pm pitch and based on sigma-delta (E-i) modulation is presented. A novel JR imager readout technique featuring photoelectron counting in the unit cell is presented for ultra-low background applications. The output of the unit cell is a digital word corresponding to the incident flux density and the readout is noise free. The design of low-power (< 5 xW), sub-electron input-referred noise, high-gain (> 100,000), small real-estate (60 p.m pitch) self-biased CMOS amplifiers required for photon counting are presented. 0-8194-1 182-5/93/$6.OO
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