The difficulties of system design are persistently increasing due to the integration of more functionality on a system, time-to-market pressure, productivity gap, and performance requirements. To address the system design problems, design methodologies build system models at higher abstraction level. However, the design task to map an abstract functional model on a system architecture is nontrivial because the architecture contains a wide variety of system components and interconnection

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... , and a given functionality can be realized in various ways depending on cost-performance tradeoffs. Therefore, a system design methodology must provide adequate design steps to map the abstract functionality on a detailed architecture. MASIC-Maths to ASIC-is a system design methodology targeting DSP applications. In MASIC, we begin with a functional model of the system. Next, the architectural decisions are captured to map the functionality on the system architecture. We present a systematic approach to classify the architectural decisions in two categories: system level decisions (SLDs) and implementation level decisions (ILDs). As a result of this categorization, we only need to consider a subset of the decisions at once. To capture these decisions in an abstract way, we present three transaction level models (TLMs) in the context of DSP systems. These TLMs capture the design decisions using abstract transactions where timing is modeled only to describe the major synchronization events. As a result the functionality can be mapped to the system architecture without meticulous details. Also, the artifacts of the design decisions in terms of delay can be simulated quickly. Thus the MASIC approach saves both modeling and simulation time. It also facilitates the reuse of predesigned hardware and software components. To capture and inject the architectural decisions efficiently, we present the grammar based language of MASIC. This language effectively helps us to implement the steps pertaining to the methodology. A Petri net based simulation technique is developed, which avoids the need to compile the MASIC description to VHDL for the sake of simulation. We also present a divide and conquer based approach to verify the MASIC model of a system. To my dear parents and caring wife vi vii Acknowledgements I would like to take the opportunity to express my sincere gratitude to my academic advisors, Dr. Johnny Öberg and Prof. Axel Jantsch for their support and encouragement over the last couple of years. I always felt myself lucky to have them as my academic advisors. Dr. J. Öberg has been deeply involved with this PhD project since its commencement, and helped me in many different ways. His ingenious ideas toward the improvement of the project, invaluable suggestions with the grammar based language used in this project, and moral support have been the constant source of motivation throughout my PhD studies. Prof. A. Jantsch has played the important part in introducing and explaining to me the role of different models of computation for modeling concurrency and time in a system model. No research project can keep pace with the rapidly evolving technology without meticulous study of contemporary research activities. He has always inspired me to read more and more research papers, and instigated me to work more by setting a high target.