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Conductive interconnections through thick silicon substrates for 3D packaging
Technical Digest. MEMS 2002 IEEE International Conference. Fifteenth IEEE International Conference on Micro Electro Mechanical Systems (Cat. No.02CH37266)
We have developed key technologies to form conductive interconnections through a thick silicon substrate, which are potentially applied for 3D device fabrication or packaging of optical MEMS devices. In this paper, we demonstrate to form metal filled Through-Holes (THs) in thick Silicon (Si) substrates (t=~500µm) mainly using Photo Assisted Electro-Chemical Etching (PAECE)[1][2] and Molten Metal Suctioned Method (MMSM) [3] . The THs that we experimentally made with these technologies had 15µm
doi:10.1109/memsys.2002.984284
fatcat:hvyxes7vr5bqnak6y42z4shmxm