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A real system evaluation of hardware atomicity for software speculation
2010
SIGARCH Computer Architecture News
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate into an x86 binary-translation system. Furthermore, doing so trivially enables additional optimization opportunities beyond that achievable by a high-performance dynamic optimizer, which already implements superblocks. We show that atomic regions can suffer from severe performance penalties if misspeculations are left
doi:10.1145/1735970.1736026
fatcat:3vjy4dxu7jc4zevynv664osg6q