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48th Midwest Symposium on Circuits and Systems, 2005.
A k-ary n-cube interconnect architecture is proposed, as an off-chip communications architecture for line cards, to increase the throughput of the currently used memory system. The k-ary n-cube architecture allows multiple packet processing elements on a line card to access multiple memory modules. The main advantage of the proposed architecture is that it can sustain current line rates and higher while distributing the load among multiple memories. Moreover, the proposed interconnect can scaledoi:10.1109/mwscas.2005.1594497 fatcat:hdx7hjifvjc7bpwzmirrjshy7u