A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2019; you can also visit the original URL.
The file type is application/pdf
.
Another Trip to the Wall
2015
Proceedings of the 2015 International Symposium on Memory Systems - MEMSYS '15
First defined two decades ago, the memory wall remains a fundamental limitation to system performance. Recent innovations in 3D-stacking technology enable DRAM devices with much higher bandwidths than traditional DIMMs. The first such products will soon hit the market, and some of the publicity claims that they will break through the memory wall. Here we summarize our analysis and expectations of how such 3D-stacked DRAMs will affect the memory wall for a set of representative HPC applications.
doi:10.1145/2818950.2818955
dblp:conf/memsys/RadulovicZRSMRA15
fatcat:zkurubdr6naz5cdg7thwmqle7m