A novel FPGA-based bunch purity monitor system at the APS storage ring

W. Eric Norum, Bingxin Yang
2007 2007 IEEE Particle Accelerator Conference (PAC)  
Bunch purity is an important source quality factor for the magnetic resonance experiments at the Advanced Photon Source. Conventional bunch-purity monitors utilizing time-to-amplitude converters are subject to dead time. We present a novel design based on a single fieldprogrammable gate array (FPGA) that continuously processes pulses at the full speed of the detector and front-end electronics. The FPGA provides 7778 single-channel analyzers (six per rf bucket). The starting time and width of
more » ... ime and width of each single-channel analyzer window can be set to a resolution of 178 ps. A detector pulse arriving inside the window of a single-channel analyzer is recorded in an associated 32-bit counter. The analyzer makes no contribution to the system dead time. Two channels for each rf bucket count pulses originating from the electrons in the bucket. The other four channels on the early and late side of the bucket provide estimates of the background. A single-chip microcontroller attached to the FPGA acts as an EPICS [1] IOC to make the information in the FPGA available to the EPICS clients.
doi:10.1109/pac.2007.4440014 fatcat:r4fivqm2gne6nmsg7vecyodpp4