An analog VLSI chip with asynchronous interface for auditory feature extraction

N. Kumar, W. Himmelbauer, G. Cauwenberghs, A.G. Andreou
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97  
We present an analog VLSI chip intended to serve as a front end of a speech recognition system. The chip architecture is inspired by biological auditory models common to humans and primate vertebrates. We include experimental results on a 1.2-m CMOS custom analog VLSI implementation and speech recognition results obtained from software simulations of the hardware on the TI-DIGITS database.
doi:10.1109/iscas.1997.608808 fatcat:7sukfekqkbeypbqfhkbajih4x4