High level extraction of SoC architectural information from generic C algorithmic descriptions

M. Mattavelli, M. Ravasi
2005 Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)  
The complexity of nowadays, algorithms in terms of number of lines of codes and cross-relations among processing algorithms that are activated by specific input signals, goes far beyond what the designer can reasonably grasp from the "pencil & paper" analysis of the (software) specifications. Moreover, depending on the implementation goal different measures and metrics are required at different steps of the implementation methodology or design flow of SoC. The process of extracting the desired
more » ... easures needs to be supported by appropriate automatic tools, since code rewriting, at each design stage, may result resource consuming and error prone. This paper presents an integrated tool for automatic analysis capable of producing complexity results based on rich and customizable metrics. The tool is based on a C virtual machine that allows extracting from any C program execution the operations and data-flow information, according to the defined metrics. The tool capabilities include the simulation of virtual memory architectures.
doi:10.1109/iwsoc.2005.71 dblp:conf/iwsoc/MattavelliR05 fatcat:52fb2xzi7vem3mabyqc7gcmj7u