Single-Issue 1500MIPS Embedded DSP with Ultra Compact Codes

Li-Chun Lin, Shih-Hao Ou, Tay-Jyi Lin, Siang-Den Deng, Chih-Wei Liu
2007 2007 Asia and South Pacific Design Automation Conference  
The performance of single-issue RISC cores can be improved significantly with multi-issue architectures (i.e. superscalar or VLIW) by activating the parallel functional units concurrently. However, they suffer high complexity or huge code sizes. In this paper, we borrow some ideas from old vector machines and propose a novel DSP architecture with very compact codes. In our simulations, the DSP has comparable performance to a 5-issue VLIW core with identical computing resources. However, its
more » ... sizes are greatly reduced. The DSP core has been implemented in the TSMC 0.13um CMOS technology, where the operating frequency is 305MHz and the core size is 1.45×1.4 mm 2 including 12KB on-chip memory.
doi:10.1109/aspdac.2007.357965 dblp:conf/aspdac/LinOLDL07 fatcat:k6xsj6yydjdr3g3yheqyftlhju