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Thermal-Aware Scheduling for Future Chip Multiprocessors
2007
EURASIP Journal on Embedded Systems
The increased complexity and operating frequency in current single chip microprocessors is resulting in a decrease in the performance improvements. Consequently, major manufacturers offer chip multiprocessor (CMP) architectures in order to keep up with the expected performance gains. This architecture is successfully being introduced in many markets including that of the embedded systems. Nevertheless, the integration of several cores onto the same chip may lead to increased heat dissipation
doi:10.1155/2007/48926
fatcat:m74lyiczcjdo3cw2ko5vokeku4