A heuristic algorithm for the fanout problem

Kanwar Jit Singh, Alberto Sangiovanni-Vincentelli
1990 Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90  
We present an algorithm to optimally distribute a signal to its required destinations. The choice of the buffers and the topology of the distribution tree depends on the availability of different strength gates and on the load and the required times at the destinations. The general problem is to construct a fanout-tree for a signal so that the required time constraint at the source node is met and the fanout-tree has a minimum area. Since the area constrained fanout problem is NP-complete and
more » ... s NP-complete and area is not a major consideration in present high density designs, we restrict our attention to the simpler problem of designing fast fanout circuits without any area constraint. The proposed algorithm builds the fanout tree by partitioning the fanout signals into subsets and then recursively solving each sub-problem At each stage the algorithm enerates a fanout tree that is an improvement over the previous stage. + his feature allows the user to specify the improvement desimd by the fanout correction process. The performance of the algorithm, when run on randomly generated distributions of required times and on real design examples, is very promising.
doi:10.1145/123186.123303 dblp:conf/dac/SinghS90 fatcat:pn4jzrepwbf45lg677lx4t7pe4