Static extraction of memory access profiles for multi-core interference analysis of real-time tasks [article]

Thomas Carle, Hugues Cassé
2021 arXiv   pre-print
We present a static analysis framework for real-time task systems running on multi-core processors. Our method analyzes tasks in isolation at the binary level and generates worst-case timing and memory access profiles. These profiles can then be combined to perform an interference analysis at the task system level, as part of a multi-core Worst-Case Response Time (WCRT) analysis. In this paper we introduce a formal description of the models and algorithmic building blocks composing our
more » ... . We also discuss how the memory access profiles generated by our method could be used to feed existing state-of-the-art WCRT frameworks. To the best of our knowledge, it is the first time that a method is documented on how to produce sound, safe and precise inputs for interference analysis methods.
arXiv:2103.17082v1 fatcat:kw4b2sqi7vfnbdm6bhf4ujpcjm