A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2011; you can also visit the original URL.
The file type is application/pdf
.
Recovery Boosting: A Technique to Enhance NBTI Recovery in SRAM Arrays
2010
2010 IEEE Computer Society Annual Symposium on VLSI
Negative Bias Temperature Instability (NBTI) is an important lifetime reliability problem in microprocessors. SRAM-based structures within the processor are especially susceptible to NBTI since one of the PMOS devices in the memory cell always has an input of '0'. Previously proposed recovery techniques for SRAM cells aim to balance the degradation of the two PMOS devices by attempting to keep their inputs at a logic '0' exactly 50% of the time. However, one of the devices is always in the
doi:10.1109/isvlsi.2010.15
dblp:conf/isvlsi/SiddiquaG10
fatcat:vr7bysrwdvbnjn7ynputiyw47u