A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2007; you can also visit the original URL.
The file type is
Latched differential FET logic
1991., IEEE International Sympoisum on Circuits and Systems
In this paper, we propose a new circuit topology for creating complex logic circuits in GaAs. Latched Differential FET Logic (LDFL) is a fully differential logic family that provides complex logic function capability, tolerance to threshold voltage variations and complementary, latched-function outputs. LDFL is capable of performing up to eleven levels of logic in one gate, while still giving excellent performance. LDFL also provides improved noise margins due to the use of bootstrapped loadsdoi:10.1109/iscas.1991.176179 fatcat:nro627ecerhaljwjpn7j6kowri