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Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, routing, and routing architecture all contribute. Previous work has shown that different placement tools can have substantially different demands for each routing layer; our objective is to develop methods that allow "tuning" of interconnect topologies to match routing resources. We focus on congestion minimization for bothdoi:10.1145/764856.764862 fatcat:nnzaallp2rcyjie4gkj3tnhff4