A practical CMP profile model for LSI design application

T. Ohta, T. Toda, H. Ueno
1999 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD'99 (IEEE Cat. No.99TH8387)  
We have developed a practical CMP model. The model is based on the elastic mechanics. For the practical use, some numerical treatments including a new time iteration method are developed. Using the model, numerical errors in a test chip are reduced to less than 1% with 5 minutes EWS calculation time. The simulated results well agree with experiments within 5% errors.
doi:10.1109/sispad.1999.799294 fatcat:kx3xin4vgrbofdmrckoqd37emu