Digital LLRF for MAX IV

Angela Salom, à Ke Andersson, Robert Lindvall, Lars Malmgren, Antonio Milan, Aleksandar Mitrovic, Francis Pérez, Schaa, Volker RW (Ed.), Arduini, Gianluigi (Ed.), Pranke, Juliana (Ed.), Seidel, Mike (Ed.), Lindroos, Mats (Ed.)
The MAX IV facility consists of a 3 GeV Storage Ring(SR), a 1.5 GeV SR, and a linear accelerator (fed by two guns) that serves as a full-energy injector to the rings, but also as a driver for the Short Pulse Facility. The RF systems of the two SRs work at 100MHz. There are 6 normal conducting capacity loaded accelerating cavities and three Landau passive cavities in the 3GeV SR. In the 1.5GeV SR there are two accelerating cavities and two Landau cavities with the same characteristics. Each of
more » ... ese cavities is fed by a modular 60kW SSA. In the 3 GeV SR the power will be doubled by adding a second SSA when required. A digital Low Level RF system has been developed using commercial uTCA boards, with a Virtex-6 FPGA mother board (Perseus 601X) and two double stack FMC boards with fast ADCs and DACs. The large capabilities of state-of-the-art FPGAs allowed including the control of two normal conducing cavities and two landau cavities in one single LLRF system, reducing the development costs. Other utilities like the handling of fast interlocks and post-mortem analysis were also added to this system. This paper summarizes the main capabilities and performance of this DLLRF.
doi:10.18429/jacow-ipac2017-thpab135 fatcat:y5vsr7kj4ree7bul3alpnyy2vm