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Synthesising Heterogeneously Encoded Systems
12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06)
Self-timed datapaths require their data to be encoded in a delay-insensitive manner. The dual-rail encoding is commonly used, but more complex codes offer the possibility of better energy efficiency or fewer wires-per-bit. However, these advantages are often negated by datapath manipulations within large systems that require code-groups to be split and reformed. These overheads may be reduced by heterogeneously encoding circuits based on the datapath requirements within the circuits. In this
doi:10.1109/async.2006.29
dblp:conf/async/TomsEB06
fatcat:wu63qfqxvnb25lldye7qql2hte