Models of Communication for Multicore Processors

Martin Schoeberl, Rasmus Bo Sorensen, Jens Sparso
2015 2015 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops  
To efficiently use multicore processors we need to ensure that almost all data communication stays on chip, i.e., the bits moved between tasks executing on different processor cores do not leave the chip. Different forms of on-chip communication are supported by different hardware mechanism, e.g., shared caches with cache coherency protocols, core-tocore networks-on-chip, and shared scratchpad memories. In this paper we explore the different hardware mechanism for on-chip communication and how
more » ... hey support or favor different models of communication. Furthermore, we discuss the usability of the different models of communication for realtime systems.
doi:10.1109/isorcw.2015.57 dblp:conf/isorc/SchoeberlSS15 fatcat:2xfammjbbnb5vkdm6zfd5wxefy