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POWERTEST: a tool for energy conscious weighted random pattern testing
1999
Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)
Abstract| Due to the increasing use of portable computing and wireless communications systems, energy consumption is of major concern in today's VLSI circuits. With that in mind we present an energy conscious weighted random pattern testing technique for Built-In-Self-Test BIST applications. Energy consumption during BIST operation can be minimized while achieving high fault coverage. Simple measures of observability and controllability of circuit nodes are proposed based on primary input
doi:10.1109/icvd.1999.745191
dblp:conf/vlsid/ZhangRB99
fatcat:2gc6wdr6bfcytjg2seeavi7ryu