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Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities
2014
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture
Voltage noise characterization is an essential aspect of optimizing the shipped voltage of high-end processor based systems. Voltage noise, i.e. variations in the supply voltage due to transient fluctuations on current, can negatively affect the robustness of the design if it is not properly characterized. Modeling and estimation of voltage noise in a pre-silicon setting is typically inadequate because it is difficult to model the chip/system packaging and power distribution network (PDN)
doi:10.1109/micro.2014.12
dblp:conf/micro/BertranBBSSCRS14
fatcat:6rgemig45rfp7gpu3smzxs6a4y