Rapid hardware prototyping on RPM-2

M. Dubois, Jaeheon Jeong, Yong Ho Song, A. Moga
1998 IEEE Design & Test of Computers  
TODAY, THERE ARE MANY competing ideas about how to implement multiprocessor systems. Although some of these ideas have been prototyped in hardware, hardware prototypes take too long to build and are very expensive. Often, by the time a hardware prototype really works, it is obsolete. First, the prototype's absolute speed is no longer on a par with current hardware. Second, the technology trade-offs among components change, so that performance results obtained on the prototype become
more » ... Third, the new architecture ideas embodied in the prototype may become irrelevant. Moreover, hardware prototypes are often hard to observe. By contrast, software simulations are very flexible, observable, and relatively inexpensive to develop. However, software simulations often force a trade-off between speed and realism. Hardware emulation using FPGAs (fieldprogrammable gate arrays) 1 is an intermediate approach between software simulation and hardware prototyping. We adopted this approach in a multiprocessor emulator called RPM (Rapid Prototyping Engine for Multiprocessor Systems). Because of its flexibility, the RPM hardware can adapt during its lifetime to the rapid evolution of technology trade-offs and new architectural ideas. RPM is also much more observable than typical hardware prototypes. RPM-2, the second RPM implementation, is up and running. Our first RPM-2 prototype is a cachecoherent nonuniform memory-access (CC-NUMA) multiprocessor. 2
doi:10.1109/54.706042 fatcat:7d4o3lvjvbg3zne6w6hgepmodq