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Implementation of Cache Fair Thread Scheduling for multi core processors using wait free data structures in cloud computing applications
2011
2011 World Congress on Information and Communication Technologies
As multi-core processors with tens or hundreds of cores begin to grow, system optimization issues once faced only by the High-Performance Computing (HPC). To satisfy the requirement, one can leverage multi-core architectures to parallelize traffic monitoring so as to progress information processing capabilities over traditional uni-processor architectures. In this paper an effective scheduling framework for multi-core processors that strike a balance between control over the system and an
doi:10.1109/wict.2011.6141313
fatcat:awglbzxx3bay3fn5d7atbof3lm