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Soft error rates in processors have been increasing with decreasing feature size and larger chips. Both hardware or software based solutions have been proposed to address this problem. However, this leads to significant overheads in chip area, performance, and/or energy. This paper proposes a novel, software-only, solution to the problem. It uses instruction duplication to detect and eventually correct transient faults with lower overhead than prior solutions. This is achieved by exploitingdoi:10.1145/2903150.2903170 dblp:conf/cd/ChenNV16 fatcat:k7z4l2sngnbknlzxofyq234ef4