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Consideration of an embedded system's timing behaviour and power consumption at system-level is an ambitious task. Sophisticated tools and techniques exist for power and timing estimations of individual components such as custom hard-and software as well as IP components. But prediction of the composed system behaviour can hardly be made without considering all system components. In this paper we present an ESL framework for timing and power aware rapid virtual system prototyping ofdoi:10.1109/samos.2014.6893210 dblp:conf/samos/GruttnerHFHLSSBNR14 fatcat:t7ggt44vgbcj7jzfym34bfnkmi