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Design and FPGA prototyping of a H: 264/AVC main profile decoder for HDTV
2007
Journal of the Brazilian Computer Society
This paper presents the architecture, design, validation, and hardware prototyping of the main architectural blocks of main profile H.264/AVC decoder, namely the blocks: inverse transforms and quantization, intra prediction, motion compensation and deblocking filter, for a main profile H.264/AVC decoder. These architectures were designed to reach high throughputs and to be easily integrated with the other H.264/AVC modules. The architectures, all fully H.264/AVC compliant, were completely
doi:10.1590/s0104-65002007000100004
fatcat:5xnihia4d5d7ta4gs6n55okjnu