Resource-constrained system-on-a-chip test: a survey

Q. Xu, N. Nicolici
2005 IEE Proceedings - Computers and digital Techniques  
Manufacturing test is a key step in the implementation flow of modern integrated electronic products. It certifies the product quality, accelerates yield learning and influences the final cost of the device. With the ongoing shift towards the core-based system-on-a-chip (SOC) design paradigm, unique test challenges, such as test access and test reuse, are confronted. In addition, when addressing these new challenges, the SOC designers must consciously use the resources at hand, while keeping
more » ... testing time and volume of test data under control. Consequently, numerous test strategies and algorithms in test architecture design and optimisation, test scheduling and test resource partitioning have emerged to tackle the resource-constrained corebased SOC test. This paper presents a survey of the recent advances in this field.
doi:10.1049/ip-cdt:20045019 fatcat:6ofceww26veufioqaq2wjhpnem