Minimum register instruction sequence problem: revisiting optimal code generation for DAGs

R. Govindarajan, H. Yang, J.N. Amaral, C. Zhang, G.R. Gao
Proceedings 15th International Parallel and Distributed Processing Symposium. IPDPS 2001  
We revisit the optimal code generation or evaluation order determination problem -the problem of generating an instruction sequence from a data dependence graph (DDG). In particular, we are interested in generating an instruction sequence Ë that is optimal in terms of the number of registers used by the sequence Ë . We call this MRIS (Minimum Register Instruction Sequence) problem. We developed an efficient heuristic solution for the MRIS problem based on the notion of instruction lineage. This
more » ... solution facilitates the sharing of registers among instructions within a lineage and across lineages by exploiting the structure of a DDG. We implemented our solution on a production compiler and measured the reduction in the number of (spill) loads and (spill) stores and the wall-clock execution time for the SPEC95 floating point benchmark suite. On average our method reduced the number of loads and stores by 11.5% and 15.9 %, respectively, and decreased the total execution time by 2.5%.
doi:10.1109/ipdps.2001.924962 dblp:conf/ipps/GovindarajanYZAG01 fatcat:ilxvwgvk4ncr5fhvjxspkcut3e