Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy

Ralph Nathan, Bryan Anthonio, Shih-Lien Lu, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun
2014 SC14: International Conference for High Performance Computing, Networking, Storage and Analysis  
In this work, we provide energy-efficient architectural support for floating point accuracy. For each floating point addition performed, we "recycle" that operation's rounding error. We make this error architecturally visible such that it can be used, whenever desired, by software. We also design a compiler pass that allows software to automatically use this feature. Experimental results on physical hardware show that software that exploits architecturally recycled error bits can (a) achieve
more » ... uracy comparable to a 64-bit FPU with performance and energy that are comparable to a 32-bit FPU, and (b) achieve accuracy comparable to an all-software scheme for 128-bit accuracy with far better performance and energy usage.
doi:10.1109/sc.2014.15 dblp:conf/sc/NathanALNSS14 fatcat:axrthxpeefg5jehl7ytaa3m66i