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Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy
2014
SC14: International Conference for High Performance Computing, Networking, Storage and Analysis
In this work, we provide energy-efficient architectural support for floating point accuracy. For each floating point addition performed, we "recycle" that operation's rounding error. We make this error architecturally visible such that it can be used, whenever desired, by software. We also design a compiler pass that allows software to automatically use this feature. Experimental results on physical hardware show that software that exploits architecturally recycled error bits can (a) achieve
doi:10.1109/sc.2014.15
dblp:conf/sc/NathanALNSS14
fatcat:axrthxpeefg5jehl7ytaa3m66i