F6: Mixed-signal/RF design and modeling in next-generation CMOS

B. Murmann, J. Savoj, P. Wambacq, Jieh-Tsorng Wu
2013 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers  
Technology awareness and modeling is important in all areas of mixed-signal and RF design. This Forum intends to provide, for next-generation CMOS, a holistic overview and discussion spanning a variety of important aspects of device modeling, reliability, and simulation. It begins with an analog/RF-centric comparison between FinFET and ultra-thin-body SOI technology. The next two talks then venture into bias stress and Electrostatic Discharge Protection (ESD), which are two issues of
more » ... ssues of ever-increasing importance for future scaling. The fourth presentation discusses the latest developments surrounding the popular BSIM transistor model, and explains how this new model can be efficiently coupled to the analog/RF design process. Motivated by their increasing significance in integrated RF transceivers, the next talk outlines a future roadmap for passive components in scaled technologies. Then, we expand upon modeling challenges that arise when components are stacked in three dimensions. Finally, this series of modeling talks is rounded up by two comprehensive presentations that summarize key challenges from the foundry and EDA-tool-vendor perspectives. Technology awareness and modeling is important in all areas of mixed-signal and RF design. This Forum intends to provide, for next-generation CMOS, a holistic overview and discussion spanning a variety of important aspects of device modeling, reliability, and simulation. It begins with an analog/RF-centric comparison between FinFET and ultra-thin-body SOI technology. The next two talks then venture into bias stress and Electrostatic Discharge Protection (ESD), which are two issues of ever-increasing importance for future scaling. The fourth presentation discusses the latest developments surrounding the popular BSIM transistor model, and explains how this new model can be efficiently coupled to the analog/RF design process. Motivated by their increasing significance in integrated RF transceivers, the next talk outlines a future roadmap for passive components in scaled technologies. Then, we expand upon modeling challenges that arise when components are stacked in three dimensions. Finally, this series of modeling talks is rounded up by two comprehensive presentations that summarize key challenges from the foundry and EDA-tool-vendor perspectives. the field of wireless sensor networks, very-low-power and low-voltage analog and RFIC design, and semiconductordevice modeling. He is one of the developers of the EKV MOS transistor model and author of the book "Charge-Based MOS Transistor Modeling -The EKV Model for Low-Power and RF IC Design" (Wiley, 2006). He is the author and co-author of more than 150 scientific papers and has contributed to numerous conference organization committees, presentations, and advanced engineering courses. has been with STMicroelecetronics ( Crolles, France), where he currently leads the development of electromagnetic devices integrated on advanced RF CMOS/BiCMOS and packaging technologies. He has authored and coauthored more than 80 refereed journal and conference technical articles. His current work deals with high-performance passive-component development in advanced bulk and SOI RF CMOS technologies, RF and mm-wave antenna design, 3D integration packaging technology, and silicon photonic passive-component development. 3D Stacking, the Best of Both Worlds: Modeling Issues in an Optimized Heterogeneous (Analog/Digital) Stacked Design Liam Madden, Xilinx, San Jose, CA Liam Madden is Corporate Vice-President, FPGA Development and Silicon Technology at Xilinx. He graduated with a B.E. from University College Dublin in 1979, and an M.Eng. from Cornell University in 1990. He oversees all FPGA hardware development at Xilinx. Prior to joining Xilinx, he worked primarily in the microprocessor field, and was a member of the team that delivered the first Alpha and StrongArm microprocessors at DEC. He has also led design teams at MIPS Technologies, Microsoft (XBOX-360), and AMD.
doi:10.1109/isscc.2013.6487605 dblp:conf/isscc/MurmannSWW13 fatcat:2ijhgo3vmrempfwupp4b6nhktu