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The use of Kohonen self-organizing feature maps in real time applications requires high computational performance, especially for embedded systems and hence neural network chips are essential. A digital architecture of Kohonen neural network with learning capability and on-chip adaptation and storage is proposed with the implementation of Kohonen Self-Organizing Map (SOM) neural networks on the low-cost Spartan-3 FPGAs. The architecture of th i s di gi tal ch i p b ased on th e i dea th at somdoi:10.33899/rengj.2009.42925 fatcat:rbfhphkbkbbcjouqce6gr3463q