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HW/SW methodologies for synchronization in FPGA multiprocessors
2009
Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '09
Modern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyping or even for final implementation. Nevertheless, efficient synchronization is required to guarantee performance in multiprocessing environments with the simple cores that do not support atomic instructions and are normally used in the standard FPGA toolchains. In this paper, we introduce two hardware synchronization
doi:10.1145/1508128.1508174
dblp:conf/fpga/TumeoPPFS09
fatcat:xd6er3ajg5bbbaxn6x4puygynm