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Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results
Proceedings Third International Symposium on High-Performance Computer Architecture
This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler generates code sequences that, when executed, digest relevant state information and execution statistics into a condition bit, or predicate. The hardware then utilizes this information to make predictions. Two categories of such architectures are p r oposed and evaluated. In Predicate Only Prediction POP, the hardware
doi:10.1109/hpca.1997.569617
dblp:conf/hpca/AugustCGH97
fatcat:x5xfvu4lfjbcpoferykymojgba