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Architectural Level Crosstalk Minimization: A Tool
Procedia Computer Science
Design automation is one of the key requirements of today's growing ASIC/SOC design process.The era of high speed and high density designs has led the design engineers various challenges. As the technology is scaling, one of the major concerns of VLSI design is signal integrity. Crosstalk is the major cause of signal integrity that occurs due to coupling of charge between the conducting interconnects.Most of the CAD tools available in the market addresses this issue at the post layout level.doi:10.1016/j.procs.2016.07.190 fatcat:bw3g7ish3bbf7bucfz7zjnu2zu