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ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
Microarchitecture (MICRO), Proceedings of the Annual International Symposium on
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring delays, Network-on-Chip (NoC) architectures are viewed as a possible solution to the wiring challenge and have recently crystallized into a significant research thrust. Both NoC performance and energy budget depend heavily on the routers' buffer resources. This paper introduces a novel unified buffer structure, calleddoi:10.1109/micro.2006.50 dblp:conf/micro/NicopoulosPKVYD06 fatcat:kkmwwo2h4jhaddrvkl6ljzubmy