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Lecture Notes in Computer Science
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks and various lowpower operating modes for each of these banks. More specifically, we propose an efficient array allocation scheme to reduce the number of simultaneously active memory banks, so that the other memory banks that are inactive can be put to low power modes to reduce the energy. We model this problem as adoi:10.1007/978-3-540-71229-9_3 dblp:conf/cc/ShyamG07 fatcat:h4niznuw7vcsziqy5fkgptlbwy