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A Two-Dimensional Superscalar Processor Architecture
2009
2009 Computation World: Future Computing, Service Computation, Cognitive, Adaptive, Content, Patterns
This paper proposes a new processor architecture optimized for execution of sequential instruction streams. The architecture, called Grid Alu Processor (GAP), comprises an inorder superscalar pipeline front-end enhanced by a configuration unit able to dynamically issue dependent and independent standard machine instructions simultaneously to the Arithmetic Logic Uunits (ALUs) organized in a two-dimensional array. In contrast to well-known coarse-grained reconfigurable architectures no special
doi:10.1109/computationworld.2009.46
fatcat:53hhjvdovnhp5jvzh5f2xj33gq