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Improved Phase-locked Loop Scheme Using Half Period FFT under Distorted Three-Phase Grid Voltage
2014
unpublished
Preserved Fulltext
To maintain the synchronization between the inverter voltages with grid under distorted grid voltage condition, an improved phase-locked loop (PLL) method using the fast Fourier transform (FFT) algorithm with minimum sampling data is proposed in this paper. The proposed algorithm calculates the phase angle and the magnitude of harmonic components accurately under the balanced three phases grid voltage. Even if the grid voltage is distorted by harmonics or three phase voltages are unbalanced,
doi:10.14257/astl.2014.65.17
fatcat:5zkj3nqnvvemnifh72acz6dlti