Hardware Specification Generated from Estelle [chapter]

Jacek Wytrębowicz
<span title="">1996</span> <i title="Springer US"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kss7mrolvja63k4rmix3iynkzi" style="color: black;">IFIP Advances in Information and Communication Technology</a> </i> &nbsp;
A specification written in the ISO standardized Estelle language can be translated into the standard hardware description language VHDL. In this paper we present such a translator and we discuss an example of its application. The Estelle formal description technique is used for specification and validation of communication protocols. VHDL is considered as an intermediate step, using of the existing simulation and synthesis tools.
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