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Standby leakage current minimization is a pressing concern for mobile applications that rely on standby modes to extend battery life. Also, gate oxide leakage current (I gate ) has become comparable to subthreshold leakage (I sub ) in 90nm technologies. In this paper, we propose a new method that uses a combined approach of sleepstate, threshold voltage (V t ) and gate oxide thickness (T ox ) assignments in a dual-V t and dual-T ox process to minimize both I sub and I gate . Using this method,doi:10.1109/date.2004.1268894 dblp:conf/date/LeeDBS04 fatcat:lkga6g4qpbda5kttduqehvtlvq