Simultaneous state, Vt and Tox assignment for total standby power minimization

Dongwoo Lee, H. Deogun, D. Blaauw, D. Sylvester
Proceedings Design, Automation and Test in Europe Conference and Exhibition  
Standby leakage current minimization is a pressing concern for mobile applications that rely on standby modes to extend battery life. Also, gate oxide leakage current (I gate ) has become comparable to subthreshold leakage (I sub ) in 90nm technologies. In this paper, we propose a new method that uses a combined approach of sleepstate, threshold voltage (V t ) and gate oxide thickness (T ox ) assignments in a dual-V t and dual-T ox process to minimize both I sub and I gate . Using this method,
more » ... Using this method, total leakage current can be dramatically reduced since in a known state in standby mode, only certain transistors are responsible for leakage current and need to be considered for high-V t or thick-T ox assignment. We formulate the optimization problem for simultaneous state, V t and T ox assignments under delay constraints and propose two practical heuristics. We implemented and tested the proposed methods on a set of synthesized benchmark circuits. Results show an average leakage current reduction of 5-6X and 2-3X compared to previous approaches that only use state or state+V t assignment, respectively, with small delay penalties.
doi:10.1109/date.2004.1268894 dblp:conf/date/LeeDBS04 fatcat:lkga6g4qpbda5kttduqehvtlvq