RAPIDITAS: RAPId Design-Space-Exploration Incorporating Trace-Based Analysis and Simulation

Amit Kumar Singh, Anup Das, Akash Kumar
2013 2013 Euromicro Conference on Digital System Design  
Simulation-based Design Space Exploration (DSE) to evaluate all possible mappings for a given application and Multiprocessor-System-on-Chip (MPSoC) platform is computationally costly for large problems. Even using efficient exploration methodologies to evaluate the mappings cannot overcome the evaluation time bottleneck. This paper presents a novel DSE methodology that analyzes the execution trace to prune the vast design space. Simulations are employed only on the pruned design points
more » ... ign points (mappings), hence reducing the number of simulations. The methodology performs iterative exploration and provides premier mappings requiring different number of processors, which can be used at run-time subject to desired performance and available platform processors. We evaluate our methodology by using models of real-life multimedia applications and demonstrate that the DSE time is reduced by 72% while generating high quality mappings.
doi:10.1109/dsd.2013.93 dblp:conf/dsd/SinghDK13 fatcat:bmaycci2inexbhgryshe3t4oa4