A unified approach to profiling the lateral distributions of both oxide charge and interface states in n-MOSFET's under various bias stress conditions

Shui-Ming Cheng, Cherng-Ming Yih, Jun-Chyi Yeh, Song-Nian Kuo, S.S. Chung
1997 IEEE Transactions on Electron Devices  
A new and accurate technique that allows the simultaneous determination of the spatial distributions of both interface states (N it ) and oxide charge (Q ox ) will be presented. The gated-diode current measurement in combination with the gate-induced drain leakage (GIDL) current were performed to monitor the generation of both N it and Q ox in n-MOSFET's. A special detrapping technique and simple calculations have been developed, from which the spatial distributions of both Nit and Qox under
more » ... it and Qox under various bias stress conditions, such as the hot-electron stress (IG;max); IB;max; and hot-hole stresses, can be determined. The calculation of gated-diode current by incorporating the extracted profiles of Nit and Qox has been justified from numerical simulation. Results show very good agreement with the experimental results. The extracted interface damages for hotelectron and hot-hole stresses have very important applications for the study of hot-carrier reliability issues, in particular, on the design of flash EPROM, E 2 PROM cells since the above stress conditions, such as the IG;max and hot-hole stress, are the major operating conditions for device programming and erasing, respectively. and has been a Full Professor since the Fall of 1989. His current teaching and research interests are in the areas of device physics; deep-submicron CMOS VLSI technology; spice device modeling; numerical simulation and modeling of submicron and deep-submicron MOS devices, SOI devices, nonvolatile memories and TFT's; characterization and reliability study of VLSI devices and circuits; and computational algorithms for VLSI circuits. He has authored or co-authored more than 80 international journal and conference papers in the above areas. He is also a co-holder of several U.S. and R.O.C. patents. Dr. Chung has served on various technical program committees of IEEE ASIC Conferenc (U.S.), International Electron Devices and Materials Symposium (IEDMS), Taiwan, and high-performance computing (HPC)-ASIA'95.
doi:10.1109/16.641360 fatcat:tohzcva5vbhmpgw53lqget5lsy