Packet-Mode Emulation of Output-Queued Switches

Hagit Attiya, David Hay, Isaac Keslassy
2010 IEEE transactions on computers  
Most common network protocols (e.g., the Internet Protocol) work with variable size packets, whereas contemporary switches still operate with fixed size cells, which are easier to transmit and buffer. This necessitates packet segmentation and reassembly modules, resulting in significant computation and communication overhead that might be too costly as switches become faster and bigger. It is therefore imperative to investigate an alternative mode of scheduling, in which packets are scheduled
more » ... ntiguously over the switch fabric. This paper studies packet-mode scheduling for the combined input output queued (CIOQ) switch architecture and investigates its cost. We devise frame-based schedulers that allow a packet-mode CIOQ switch with small speedup to mimic an ideal output-queued switch with bounded relative queuing delay. The schedulers are pipelined and are based on matrix decomposition. Our schedulers demonstrate a trade-off between the switch speedup and the relative queuing delay incurred while mimicking an output-queued switch. When the switch is allowed to incur high relative queuing delay, a speedup arbitrarily close to 2 suffices to mimic an ideal output-queued switch. This implies that a packet-mode scheduler does not require a fundamentally higher speedup than a cell-based scheduler. The relative queuing delay can be significantly reduced with just a doubling of the speedup. We further show that it is impossible to achieve zero relative queuing delay (that is, a perfect emulation), regardless of the switch speedup. Finally, we show that a speedup arbitrarily close to 1 suffices to mimic an output-queued switch with a bounded buffer size. 1 The speedup of the switch is the ratio between the rate in which the switch fabric operates and the external rate.
doi:10.1109/tc.2009.186 fatcat:nehjv4ajo5einopls7x2ojizei