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Bit-fixing codes for multi-level cells
<span title="">2012</span>
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<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/jyfj6ubbwzcqdb2m3vg7epe6tu" style="color: black;">2012 IEEE Information Theory Workshop</a>
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Codes that correct limited-magnitude errors for multi-level cell nonvolatile memories, such as flash memories and phase-change memories, have received interest in recent years. This work proposes a new coding scheme that generalizes a known result [2] and works for arbitrary error distributions. In this scheme, every cell's discrete level is mapped to its binary representation (bm−1, · · · , b1, b0), where the m bits belong to m different error-correcting codes. The error ε in a cell is mapped
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... o its binary representation (em−1, · · · , e1, e0), and the codes are designed such that every error bit ei only affects the codeword containing the data bit bi. The m codewords are decoded sequentially to correct the bit-errors e0, e1, · · · , em−1 in order. The scheme can be generalized to many more numeral systems for cell levels and errors, optimized cell-level labelings, and any number of cell levels. It can be applied not only to storage but also to amplitude-modulation communication systems.
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