Evolutionary algorithm approach for symbolic FSM traversals

M.A. Thornton, R. Drechsler
2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233)  
State space traversal algorithms for Finite State Machine (FSM) models of synchronous sequential circuitry are used extensively in various formal verification approaches such as Equivalence Checking (EC) and model checking. Symbolic Binary Decision Diagram (BDD) based approaches have allowed many FSM models to be verified due to the compact representations they provide. However, there still remain circuits for which the traversal cannot be carried out due to the size of the Transition Relation
more » ... ransition Relation (TR) BDD becoming too large. Pruning algorithms designed to reduce the size of a BDD while maintaining as much functionality as possible are examined for here. These techniques are based upon evolutionary algorithms that have bee shown to significantly reduce the size of BDDs while retaining a large amount of functionality.
doi:10.1109/pacrim.2001.953681 fatcat:757idm44gjcztn6mw4cbpt2o3e