Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems

Suman Mamidi, Michael J. Schulte, Daniel Iancu, John Glossner
2007 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)  
that may be implemented in software on programmable platforms. As noted in [1], next generation receivers Explicitly multithreaded processors and reconfigurable are expected to require processing capabilities of over hardware have individuallyproven to be useful in the design 200 billion operations per second. However, the overall of wireless communication systems. However, new techimplementation area and power budget for mobile devices niques are needed to satisfy the processing requirements
more » ... at support emerging communication systems have reofemerging wireless communication standards, which have mained relatively unchanged [1]. In addition to supporting high throughput requirements for a wide variety of alemerging complex communication systems with strict realgorithms. This paper presents an efficient technique for time constraints, mobile devices have to support a large adding reconfigurable functional units, called Polymor-number of features, such as image and video processing, phic Hardware Accelerators (PHAs), to multicore, multispeech recognition and office applications, which have non-threadedDigital Signal Processors (DSPs). This paper dis-real-time constraints. cusses architectural support to facilitate management and Explicitly multithreaded processors and reconfigurable sharing ofPHAs on a multithreaded system. The proposed hardware devices have individually proven useful in the technique shows an average speedup of 6.8 on important design of wireless communication systems. Explicitly mulwireless communication algorithms in the EEMBC Telecom tithreaded processors provide a platform to exploit the large Benchmark Suite and Department of Defense's Joint Tacamounts of thread-level parallelism available in communitical Radio System Software Communication Architecture cation systems and reconfigurable hardware devices provide (JTRS SCA) Hardware Supplement. a platform for customization that reduces the gap between an algorithm's requirements and its implementation. These observations motivate augmenting multithreaded proces-
doi:10.1109/asap.2007.4430000 dblp:conf/asap/MamidiSIG07 fatcat:54jcvymgabecvlndtf3yza5uim