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Lecture Notes in Computer Science
This paper investigates specification, verification and test generation for synchronous and asynchronous circuits. The approach is called DILL (Digital Logic in LOTOS). DILL models are discussed for synchronous and asynchronous circuits. Relations for (strong) conformance are defined for verifying a design specification against a high-level specification. An algorithm is also outlined for generating and applying implementation tests based on a specification. Tools have been developed fordoi:10.1007/3-540-44798-9_9 fatcat:33r4ite2yjbannbadpimkko7oa