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Fixed-Point Configurable Hardware Components
2006
EURASIP Journal on Embedded Systems
To reduce the gap between the VLSI technology capability and the designer productivity, design reuse based on IP (intellectual properties) is commonly used. In terms of arithmetic accuracy, the generated architecture can generally only be configured through the input and output word lengths. In this paper, a new kind of method to optimize fixed-point arithmetic IP has been proposed. The architecture cost is minimized under accuracy constraints defined by the user. Our approach allows exploring
doi:10.1155/es/2006/23197
fatcat:7gycrr4qjfh55hkupltluplmju